| PART |
Description |
Maker |
| M29W160ET M29W160EB70N6 M29W160EB90N6E M29W160EB70 |
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
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Numonyx B.V
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| M29W160EB M29W160EB70N6 M29W160EB70N6E M29W160EB70 |
16 Mbit (2Mb x8 or 1Mb x16, Boot Block) 3V Supply Flash Memory
|
STMICROELECTRONICS[STMicroelectronics]
|
| M27W032-110N1T M27W032 M27W032-100M1T M27W032-100N |
32 Mbit 2Mb x16 3V Supply FlexibleROM Memory
16 Mbit 1Mb x16 3V Supply FlexibleROM Memory
32 Mbit 2Mb x16 3V Supply FlexibleROM⑩ Memory
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ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
|
| M27C160-100F1 M27C160-100F6 M27C160-50F1 M27C160-5 |
16 MBIT (2MB X8 OR 1MB X16) UV EPROM AND OTP EPROM
16 Mbit 2Mb x8 or 1Mb x16 UV EPROM and OTP EPROM
|
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
|
| M27C160-50B1 M27C160-120S1TR -M27C160-150M6 |
16 Mbit 2Mb x8 or 1Mb x16 UV EPROM and OTP EPROM
|
意法半导
|
| LH28F160S3 LH28F160S3-L10 LH28F160S3-L13 LH28F160S |
LH28F160S3NS-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP
LH28F160S3HT-L130 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP
LH28F160S3D-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3HNS-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP
LH28F160S3HNS-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP
LH28F160S3HD-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3HD-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3HB-L130 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
LH28F160S3HB-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
LH28F160S3HB-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
16-MBIT(2MBx8/1MBx16) Smart 3 Flash MEMORY
16-MBIT (2MBx8/1MBx16) Smart 3 Flash MEMORY
LH28F160S3HB-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
LH28F160S3HB-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
LH28F160S3HB-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin CSP
LH28F160S3HD-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3HD-L150 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3HNS-L100 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin SSOP
LH28F160S3D-L13 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 64 pin SDIP
LH28F160S3R-L10 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP
LH28F160S3HR-L120 16MBIT (2MB x 8/1MB x 16)Smart 3 Flash Memory 56 pin TSOP
|
SHARP[Sharp Electrionic Components]
|
| M36W0R6040T0 M36W0R6040B0ZAQF M36W0R6040T0ZAQF M36 |
64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 16 Mbit (1Mb x16) PSRAM, Multi-Chip Package
|
ST Microelectronics
STMicroelectronics
|
| M36W432-ZAT M36W432B85ZA1T M36W432B70ZA1T M36W432T |
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product 32兆位Mb x16插槽，开机区块快闪记忆体兆位256K x16的SRAM，多个存储产
|
STMicroelectronics N.V.
意法半导
|
| M36DR432DA10ZA6T |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product
|
http://
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| M36DR432AD M36DR432AD10ZA6T M36DR432AD12ZA6T M36DR |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256Kb x16 SRAM, Multiple Memory Product
|
STMICROELECTRONICS[STMicroelectronics]
|
| M36DR432-ZAT M36DR432A100ZA6T M36DR432A100ZA6C M36 |
32 Mbit 2Mb x16, Dual Bank, Page Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product 32兆位Mb x16插槽，双行，页闪存和4兆位256K x16的SRAM，多个存储产
|
意法半导
STMicroelectronics N.V.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation.
Renesas Electronics, Corp.
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